SK hynix and SanDisk released the first open technical specification for a new memory category on August 4, 2026, aimed squarely at a bottleneck that’s becoming as important to AI progress as raw chip supply: getting enough memory bandwidth and capacity to actually feed today’s models.
Quick facts
- SK hynix and SanDisk published the first standard specification for High Bandwidth Flash (HBF) through the Open Compute Project on August 4, 2026, at the FMS 2026 conference.
- HBF is a new memory layer positioned between High Bandwidth Memory (HBM) and SSDs, combining HBM-like speed with NAND-based capacity.
- Initial specifications support up to 512GB per device with three bandwidth grades, roughly 0.4 to 3.0 terabytes per second, using the UCIe chiplet interconnect.
- Google and Tenstorrent joined the HBF consortium during standardization, alongside founding members SK hynix and SanDisk.
- The specification arrived just six months after the HBF technology workstream launched under OCP in February 2026.
Why a new memory tier, instead of just more HBM
Per SK hynix’s own announcement, the problem HBF targets is specific: as models scale into the trillions of parameters, HBM capacity on accelerator packages has become both a technical and financial bottleneck, HBM is fast but expensive and capacity-constrained. HBF is pitched as a middle tier: not as fast as HBM, but far higher capacity, and cheaper, letting AI infrastructure providers mix tiers intelligently rather than relying purely on the most expensive memory available for every workload.
Making it an open standard is the strategic bet
Publishing the spec openly through the Open Compute Project, rather than keeping it proprietary, is a deliberate move to build a broad ecosystem fast, the same logic behind open hardware standards generally: interoperability and wide adoption matter more early on than capturing the whole category for one company. Google and Tenstorrent’s participation as consortium members during the standardization process, not just as customers afterward, suggests real buy-in from companies that will actually build systems using it.
This is the same memory-wall problem showing up everywhere
This lands alongside a broader pattern in AI hardware coverage this year: power, not just chip supply, has become a real constraint on new capacity, and now memory architecture is getting the same scrutiny. Tiered memory, using HBM, HBF, and SSDs together rather than defaulting to the most expensive option everywhere, is emerging as a genuine cost and efficiency lever for the whole industry, not just a niche optimization.
Key takeaway
HBF won’t replace HBM, it’s meant to sit alongside it, but if it gains real adoption it could meaningfully lower the cost of running large AI inference workloads at scale, a genuine, if unglamorous, lever on the economics of the whole AI buildout.
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